Étienne André – Talks

Talks

Date Context Title Place
23rd March 2012 School of Computing Seminar Flag United Kingdom Parameter Synthesis for Hierarchical Concurrent Real-Time Systems Flag Singapore Singapore
28th September 2011 RP’11 Flag United Kingdom Synthesis of Timing Parameters Satisfying Safety Properties Flag Italy Genoa
19th May 2011 Séminaire IRT Flag United Kingdom Synthesis of Timing Parameters for the Verification of Hardware Components and Communication Protocols Flag France Toulouse
13th May 2011 Séminaire du LIP6 SoC Flag United Kingdom Synthesis of Timing Parameters for the Verification of Hardware Components Flag France Paris
26th January 2011 Computing Students Talks Flag United Kingdom The Good, the Bad and the Unkown – Synthesis of Timing Parameters in Concurrent Systems Flag Singapore Singapore
8th December 2010 Ph.D. defense Flag United Kingdom An Inverse Method for the Synthesis of Timing Parameters in Concurrent Systems Flag France Cachan
2nd December 2010 Seminary IST Austria Flag United Kingdom An Inverse Method for the Synthesis of Timing Parameters in Concurrent Systems Flag Austria Vienna
26th October 2010 CNR-CNRS Project "Verification of infinite state and real time systems" Flag United Kingdom Comparison of variants of the inverse method in timed automata Flag Italy Rome
21st October 2010 Séminaire 68NQRT Flag United Kingdom Synthesis of Good Parameters in Timed Automata Flag Brittany, France Rennes
21st September 2010 INFINITY’10 Flag United Kingdom IMITATOR II: A Tool for Solving the Good Parameters Problem in Timed Automata Flag Singapore Singapore
28th August 2010 RP’10 Flag United Kingdom Behavioral cartography of timed automata Flag Czech Republic Brno
5th July 2010 CNR-CNRS Project "Verification of infinite state and real time systems" Flag United Kingdom Synthesis of constraints in order to generalize a reference behavior in timed automata Flag Italy Rome
23rd February 2010 Séminaire Pop Art Flag United Kingdom A new approach for the good parameters problem in timed automata Flag France Grenoble
22nd January 2010 Séminaire MeFoSyLoMa Flag United Kingdom Synthesis of timing parameters in timed automata for the verification of hardware components Flag France Paris
18th November 2009 MSR’09 Flag France Synthèse de contraintes temporisées pour une architecture d’automatisation en réseau Flag France Nantes
12th November 2009 Séminaire LIF Flag United Kingdom Synthesis of constraints in order to generalize a reference behavior in timed automata Flag France Marseille
20th October 2009 Séminaire LIST (CEA) Flag United Kingdom Synthèse de contraintes pour la généralisation d’un comportement de référence dans les automates temporisés Flag France Saclay
8th October 2009 Séminaire Farman Flag France SIMOP : synergie simulation et model-checking paramétré Flag France Cachan
23rd September 2009 AVoCS’09 Flag United Kingdom An Extension of the Inverse Method to Probabilistic Timed Automata Flag Wales Gregynog
3rd September 2009 ETR’09 Flag France Une méthode inverse pour les processus de décision markoviens Flag France Paris
31st August 2009 INFINITY’09 Flag United Kingdom An Inverse Method for Markov Decision Processes Flag Italy Bologna
20th August 2009 ICTAC’09 Flag United Kingdom IMITATOR: A Tool for Synthesizing Constraints on Timing Bounds of Timed Automata Flag Malaysia Kuala Lumpur
17th September 2008 RP’08 Flag United Kingdom A Generalisation Method for Parametric Timed Automata Flag England Liverpool
25th June 2007 Soutenance du master en informatique de Rennes 1 Flag France Gestion des théories par les foncteurs logiques Flag Brittany, France Rennes
7th February 2007 Séminaire du master en informatique de Rennes 1 Flag France Construction et utilisation des logiques dans les systèmes d’information Flag Brittany, France Rennes
2nd February 2006 Hauptseminar Metamodelling Flag United Kingdom Metamodelling and Language Engineering Flag Germany Dresden

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